venue

Giancarlo Fortino, University of Calabria, Italy

   

Fortino light"Towards Multi-Layer Interoperability of IoT Platforms: the INTER-IoT approach"

            


Short bio:

 

Giancarlo Fortino (SM’12) received the Laurea (B.S and M.S) and Ph.D in computer engineering from the University of Calabria, Italy, in 1995 and 2000, respectively. He is currently an Associate Professor of Computer Engineering (since 2006) with the Department of Informatics, Modeling, Electronics and Systems (DIMES), University of Calabria. He holds the Scientific Italian Habilitation for Full Professor and he is also Adjunct Full Professor of Computer Engineering at Wuhan University of Technology in the framework of High-End Foreign Experts in China and adjunct senior researcher at Italian National Research Council. He authored about 300 publications in journals, conferences, and books. He is currently the Scientific and Technical Project Manager of the EU-funded H2020 INTER-IoT project on heterogeneous IoT platform interoperability. His research interests include distributed computing, wireless sensor networks, body area networks, software agents, IoT technology, cloud computing. He is an associate editor of IEEE Trans. on Affective Computing, IEEE Trans. on Human-Machine Systems, Information Fusion, Engineering Application of Artificial Intelligence, Journal of Network and Computer Applications. He is founding co-chair of SMC TC on Interactive and Wearable Computing and Devices and is the Chair of the Italian Chapter of the IEEE SMC Society. He is co-founder and CEO of SenSysCal S.r.l., a spin-off of University of Calabria, engaged in advanced applied research and development of IoT systems.


 

Talk:

 

While still in his infancy, the IoT domain already lists a number of solutions implemented, ranging from simple devices to full-fledged platforms. However, the heterogeneity at all levels (device, networking, middleware, services, data and semantics) of those solutions is preventing different systems to interoperate effectively, despite significant efforts in the development of a unique reference standard for IoT systems technology. The situation is likely to worsen in the near future, as lack of interoperability will cause major technological and business-oriented issues such as impossibility to plug non-interoperable IoT devices into heterogeneous IoT platforms, impossibility to develop IoT applications exploiting multiple platforms in homogeneous and/or cross domains, slowness of IoT technology introduction at large-scale, discouragement in adopting IoT technology, increase of costs, scarce reusability of technical solutions, and user dissatisfaction. This keynote will aim at analyzing such lack of interoperability in the IoT realm by proposing, as effective solution, the INTER-IoT approach that is being developed in our EU-funded H2020 project. In particular, first the keynote will provide the state-of-the-art of research- and standard-oriented approaches (including AIOTI and IEEE P2413); then, it will focus on the current status of the "products" of INTER-IoT granting multi-layer interoperability and IoT platform integration: INTER-LAYER, INTER-FW, and INTER-METH. Finally, we present two case studies in which our solutions will be tested: INTER-Health (interoperability among e-Health platforms) and INTER-LogP (interoperability in port logistics).


 

OTM 2017 KEYNOTES

markus lanthaler2

Dr. Markus Lanthaler, Software Engineer at Google; creator of JSON-LD and Hydra

"Pragmatic Semantics at Web Scale" - Tuesday 24/10, 09:00
michaelbrodie bio

Michael Brodie, Research Scientist, CSAIL, MIT

"On Data, The World’s Most Valuable Resource, and Data Science" - Thursday 26/10, 09:00
stamper small

Ronald Stamper

"Semiotics and BREXIT" - Pre-banquet keynote, Wednesday 25/10 evening, 19h00
Stephen Mellor small

Stephen Mellor, Industrial Internet Consortium CTO

"Evolution of the Industrial Internet of Things: Preparing for Change" - Wednesday 25/10, 09:00

OTM 2017 TUTORIALS

boley

Harold Boley, University of New Brunswick, Canada

"Port Clearance Rules in PSOA RuleML: From Controlled-English Regulation to Object-Relational Logic"